The invention relates to the fabrication of integrated circuit (IC) devices, particularly to dielectric materials, and more particularly to the fabrication of a low-k interlevel dielectric layer (ILD).
Semiconductor devices are typically joined together to form useful circuits using interconnect structures comprising conductive materials (e.g., metal lines) such as copper (Cu) or aluminum (Al) and dielectric materials such as silicon dioxide (SiO2). The speed of these interconnects can be roughly assumed to be inversely proportional to the product of the line resistance (R), and the capacitance (C) between lines. To reduce the delay and increase the speed, it is desirable to reduce the capacitance (C). This can be done by reducing the dielectric constant k of the dielectric material in the interlevel dielectric layers (ILDs). Thus, there is considerable interest in developing low-k materials as well as deposition methods for them that are compatible with integrated circuit technology.
A common dielectric material for use in an interlevel dielectric layer (ILD) is silicon dioxide (SiO2, also referred to herein simply as “oxide”). Oxide has a dielectric constant k of at least 3.85, and typically 4.1–4.3 or higher. Air has a dielectric constant k of approximately 1.0. By definition, a vacuum has a dielectric constant k of 1.0.
Low-k dielectric materials are known, and are typically defined as materials having a dielectric constant k less than 3.85—in other words, less than that of oxide. A variety of low-k materials are known. They can generally be characterized by their composition and/or by the way in which they typically are deposited.
Deposition is a process whereby a film of either electrically insulating (dielectric) or electrically conductive material is deposited on the surface of a semiconductor wafer. Chemical Vapor Deposition (CVD) is used to deposit both dielectric and conductive films via a chemical reaction that occurs between various gases in a reaction chamber. Plasma Enhanced Chemical Vapor Deposition (PECVD) uses an inductively coupled plasma to generate different ionic and atomic species during the deposition process. PECVD typically results in a low temperature deposition compared to the corresponding thermal CVD process. Spin-on deposition is used to deposit materials such as photoresist, and can also be used to deposit dielectric materials. In an example of spin-on deposition, a wafer is coated with material in liquid form and then spun at speeds up to 6000 rpm, during which the liquid is uniformly distributed on the surface by centrifugal forces. This step is followed by a low temperature bake which solidifies the material.
Examples of spin-on low-k materials include:                BCB (divinylsiloxane bisbenzocyclobutene), sold by Dow Chemical.        SiLK™, an organic polymer with k=2.65, similar to BCB, sold by Dow Chemical.        NANOGLASS™, an inorganic porous polymer with k=2.2, sold by Honeywell.        FLARE 2.0™ dielectric, an organic low-k poly(arylene)ether available from Allied Signal, Advanced Microelectronic Materials, Sunnyvale, Calif.        Inorganic materials such as spin-on glass (SOG), fluorinated silicon glass (FSG) and, particularly, methyl-doped porous silica which is referred to by practitioners of the art as black diamond, or BD.        Organo-silicate materials, such as JSR LKD 5109 (a spin-on material from japan Synthetic Rubber).        Organic polymers (fluorinated or non-fluorinated), inorganic polymers (nonporous), inorganic-organic hybrids, or porous materials (xerogels or aerogels).        Materials in the parylene family of polymers, the polynapthalene family of polymers, or polytetrafluoroethylene.        
Examples of low-k Chemical Vapor Deposition (CVD) and Plasma Enhanced CVD (PECVD) low-k materials include:
Black Diamond™, an organosilicon glass (OSG) which is a Si—O—C—H type of material with a dielectric constant k of 2.7 to 3.0 (e.g., 2.9), sold by Applied Materials Inc.                CORAL™, also an organosilicon glass (OSG) which is a Si—O—C—H type of material with a k of 2.7–3.0, sold by Novellus Systems, Inc.        fluorinated SiO2 glass, and amorphous C:F.        
It is known that pores in dielectric materials can lower the dielectric constant. Low-k dielectric materials can typically be deposited ab initio either with or without pores, depending on process conditions. Since air has a near 1 dielectric constant, porous films exhibit reduced dielectric constants as compared with the dielectric constants of the base material in which they are developed. Generally, it is the spin-on materials (e.g., SiLK, NANOGLASS) that exhibit a high degree of porosity. The PECVD materials generally do not exhibit such a high degree of porosity due to the method of deposition. As a result, it is very difficult to prepare a CVD film with a k value of <2.5.
The use of low-k (<3.9) materials, with or without pores, is well known for use as an Interlevel Dielectric Layer (ILD). Sometimes, materials having k<2.5 are referred to as “ultralow-k”.
Dual damascene structures have received widespread application in recent years. Generally, a dual damascene structure comprises a via etched through a first dielectric layer and a trench etched through a second, overlying dielectric layer. The via and trench are over-filled with metal (usually copper) and then planarized with chemical mechanical polishing (CMP). An example of a dual damascene structure is illustrated in U.S. Pat. No. 6,538,839.
A problem with some low-k materials, particularly those that are organic in nature, is that they are generally not compatible with chemical mechnical polishing (CMP). Because of their organic nature these materials are innately soft This physical property of beong soft can give rise to problems during semiconductor processing, particularly during planarization, by chemical mechanical polishing (CMP).
As noted in U.S. Pat. No. 6,538,839, inorganic low-k dielectrics enjoy several advantages over the organic variety, such as good thermal conductivity suitability for production. But one problem associated with them is that when in thin film form, they are found to be in a state of high tensile stress. This is the case, regardless of how they are deposited. Because these low-k inorganic films have a tendency to delaminate, particularly near the edges of the substrate where the restoring forces are the strongest.